Capacitors have a variety of applications in integrated circuits. For example, in mixed-signal circuits, capacitors are used in phase locked loops (PLLs) and in radio-frequency (RF) circuits, capacitors are used in an RF resonator. For another example, decoupling capacitors are used to decouple portions of the integrated circuits from one another to reduce the impact of noise from some portions to other portions.
In various situations, a capacitor array occupies a large percentage of area of the circuit, including, for example, 50% of the total area of a PLL. A large capacitor array not only causes a chip area to increase, but also worsens other problems such as IR drop and electromigration (EM) reliability due to more and longer wires coupled to power lines. These problems, for example, cause higher instability in a supplied voltage, and affect performance and functions of the chip. Therefore, optimizing area efficiency of capacitors, capacitance per unit area, is applicable for various reasons.
In some approaches, a metal-oxide-semiconductor (MOS) capacitor and a metal-oxide-metal (MOM) capacitor are vertically arranged on the same layout area to increase capacitance per unit area. The MOS capacitor is built based on capacitance inherent to an active element such as an NMOS and a PMOS. The MOM capacitor is constructed by two electrodes with stacked layers of comb-like structures separated by dielectrics. When the MOS capacitor and the MOM capacitor are vertically arranged on the same layout area, a shielding layer is inserted therebetween to separate capacitance of the MOS capacitor from that of the MOM capacitor. However, such shielding layer uses one extra layer and therefore occupies one metallization layer that the MOM capacitor can use to contribute to capacitance per unit area.
In some approaches, a plurality of MOM capacitor units is connected to form a capacitor array. To connect two electrodes of two corresponding MOM capacitor units, an additional metallization layer is used. However, the additional metallization layer results in a lower capacitance per unit area.
Like reference symbols in the various drawings indicate like elements.